The next great leap in artificial intelligence may depend on a technology that does not make processors faster at all. Instead, it may come from changing the way processors communicate. As high-performance computing systems and AI data centres grow, the movement of information between chips is becoming one of the biggest limits on performance. Powerful accelerators can execute enormous numbers of calculations, but they increasingly spend time waiting for data to arrive. A review published in Nature Electronics examines how co-packaged optics and optical chip-to-chip interconnects could replace conventional electrical connections, creating faster and more energy-efficient communication networks inside future computing machines.
Modern AI systems rely on thousands of processors, memory devices and networking components operating as a single computational platform. Training a large model requires continuously distributing data, exchanging intermediate results and synchronizing calculations across these devices. In traditional systems, these connections are made with copper traces, cables and electrical transceivers. At relatively short distances, electrical links remain efficient and inexpensive. However, as data rates rise, their physical limitations become increasingly severe. The resistance of conductors converts electrical energy into heat, while capacitance slows the charging and discharging of signals. At higher frequencies, skin effect, dielectric loss and signal reflections further distort the data stream.
The result is a growing communication bottleneck between processors. To compensate for signal degradation, electrical systems often require equalizers, retimers, amplifiers and other signal-conditioning circuits. These components consume power and add latency, particularly when a signal must pass through multiple stages. Electrical links also become more difficult to scale when many high-speed channels are placed close together, because neighbouring wires can interfere with one another through electromagnetic coupling. The problem is especially acute in AI hardware, where the performance of an accelerator is increasingly determined not only by its arithmetic capability but also by how quickly it can access memory and exchange data with other accelerators.
Optical interconnects approach the problem differently by transporting information as light. An electrical data signal is converted into an optical signal by a modulator, transmitted through a waveguide or optical fibre, and then converted back into an electrical signal by a photodetector. Light does not experience the same resistive losses as an electrical current flowing through a metal conductor, and optical channels can carry extremely high data rates over compact physical paths. Multiple wavelength channels can also share the same waveguide through wavelength-division multiplexing, allowing several independent data streams to travel simultaneously. These properties make optical communication attractive not only for long-distance data-centre networks but also for connections between chips in the same computing package.
Co-packaged optics brings the optical transceiver directly beside the electronic switching or computing device rather than placing it at the end of a long electrical connection. In a conventional architecture, a high-speed electrical signal may travel from a processor or switch across a package, through a board and into a separate optical module. Every additional millimetre of electrical routing increases loss and places greater demands on the transmitter and receiver. By positioning photonic components next to the main chip, co-packaged optics can shorten the electrical path and move the conversion from electrical to optical signals closer to the point where data is generated. The optical signal can then travel across the system with lower propagation loss and potentially lower energy per transmitted bit.
The review identifies three interconnected technological domains that determine whether optical compute interconnects can deliver system-level benefits. The first is the electrical subsystem, which includes drivers, receivers, serializers and deserializers, clocking circuits and power-management components. The second is the electro-optical and opto-electronic interface, where modulators encode data onto light and photodetectors recover it. The third is the optical transmission network, consisting of waveguides, fibres, couplers, switches and multiplexing structures. Improvements in only one domain may not be enough. A highly efficient optical modulator, for example, cannot compensate for inefficient driver electronics, poor coupling or excessive thermal overhead elsewhere in the package.
The roadmap described in the study follows the evolution of packaging from two-dimensional arrangements to increasingly integrated architectures. In a 2D co-packaged design, optical engines and electronic chips are placed side by side on a common substrate or package. This approach is comparatively accessible because it builds on established assembly methods, but it can require long connections across the package and may limit the density of optical channels. A 2.5D architecture uses an interposer, a specialised layer that provides dense electrical and optical routing between chiplets. By bringing compute, memory, switching and photonic components closer together, interposers can support shorter links and higher bandwidth densities while preserving some manufacturing flexibility.
The most ambitious stage is three-dimensional heterogeneous integration, in which different materials and devices are stacked vertically. Electronic logic, photonic circuits, laser sources and optical detectors could occupy separate layers optimized for their individual functions. Such integration could dramatically reduce the distance that signals travel and increase the number of connections available within a small footprint. It also introduces difficult engineering problems. Photonic devices often require materials and fabrication processes that differ from those used for advanced logic circuits. Aligning optical structures across stacked layers demands extreme precision, while repairing or testing a multilayer assembly can be more complicated than testing separate components.
Heat is another central challenge. Optical communication may reduce the energy required to move each bit, but the system still contains lasers, modulators, drivers, receivers and high-performance processors that generate heat. Co-locating these components concentrates thermal power in a small area. Temperature changes can alter the refractive index of photonic materials, shift the operating wavelength of resonant devices and reduce the stability of optical links. Lasers and detectors also have temperature-dependent performance. Effective cooling must therefore protect both the electronic circuits and the optical alignment, potentially requiring advanced heat spreaders, microfluidic cooling or new package materials capable of managing heat without disrupting optical operation.
Manufacturing and standardization will determine whether these technologies move beyond demonstrations and into large-scale computing infrastructure. Optical systems must be assembled with precise alignment, tested at high throughput and manufactured with acceptable yields. A defect in a photonic component or an imperfect fibre coupling point can reduce the performance of an entire package. The industry also needs common standards for optical interfaces, control protocols, chiplet communication, thermal specifications and testing procedures. Without interoperability, system designers may be locked into proprietary solutions, slowing adoption and increasing costs. Standardized interfaces could allow processors, photonic engines and memory devices from different suppliers to be combined in modular architectures.
The review presents optical compute interconnects not as a single replacement technology but as a broad architectural shift. The most successful systems are likely to combine electrical and optical links, assigning each connection type to the distance, bandwidth and latency requirements for which it is best suited. Electrical interconnects may continue to dominate very short local routes, while optical channels handle communication between chiplets, packages, racks or distant accelerator clusters. If engineers can reduce conversion losses, control heat, improve manufacturability and establish reliable standards, co-packaged optics could become a foundation for future AI and high-performance computing systems. The race to build faster artificial intelligence may therefore be decided not only inside the processor, but also in the invisible network of light carrying data between its many parts.
Subject of Research: Optical chip-to-chip interconnects and co-packaged optics for high-performance computing and artificial intelligence
Article Title: Co-packaged optics for high-performance computing and artificial intelligence
Article References: Kim, B., Choi, S.H., Zograf, G. et al. Co-packaged optics for high-performance computing and artificial intelligence. Nat Electron (2026). https://doi.org/10.1038/s41928-026-01681-6
Image Credits: AI Generated
DOI: https://doi.org/10.1038/s41928-026-01681-6
Keywords: Co-packaged optics, optical interconnects, photonic computing, chip-to-chip communication, artificial intelligence, high-performance computing, heterogeneous integration, 2.5D interposers, 3D stacking, data-centre technology
Tags: accelerating AI training with opticsartificial intelligence hardwareco-packaged optics technologydata center communication optimizationenergy-efficient processor communicationhigh-performance computinghigh-speed data transfer in AI systemsintegrated photonics in computingnext-generation data center networkingoptical chip-to-chip interconnectsoptical communication for HPCovercoming electrical interconnect limitations
