Credit: Yokohama National University
Data centers are processing data and dispensing the results at astonishing rates and such robust systems require a significant amount of energy — so much energy, in fact, that information communication technology is projected to account for 20% of total energy consumption in the United States by 2020.
To answer this demand, a team of researchers from Japan and the United States have developed a framework to reduce energy consumption while improving efficiency.
They published their results on July 19 in Scientific Reports, a Nature journal.
“The significant amount of energy consumption has become a critical problem in modern society,” said Olivia Chen, corresponding author of the paper and assistant professor in the Institute of Advanced Sciences at Yokohama National University. “There is an urgent requirement for extremely energy-efficient computing technologies.”
The research team used a digital logic process called Adiabatic Quantum-Flux-Parametron (AQFP). The idea behind the logic is that direct current should be replaced with alternating current. The alternating current acts as both the clock signal and the power supply – as the current switches directions, it signals the next time phase for computing.
The logic, according to Chen, could improve conventional communication technologies with currently available fabrication processes.
“However, there lacks a systematic, automatic synthesis framework to translate from high-level logic description to Adiabatic Quantum-Flux-Parametron circuit netlist structures,” Chen said, referring to the individual processors within the circuit. “In this paper, we mitigate that gap by presenting an automatic flow. We also demonstrate that AQFP can achieve a reduction in energy use by several orders of magnitude compared to traditional technologies.”
The researchers proposed a top-down framework for computing decisions that can also analyze its own performance. To do this, they used logic synthesis, a process by which they direct the passage of information through logic gates within the processing unit. Logic gates can take in a little bit of information and output a yes or no answer. The answer can trigger other gates to respond and move the process forward, or stop it completely.
With this basis, the researchers developed a computation logic that takes the high-level understanding of processing and how much energy a system uses and dissipates and describes it as an optimized map for each gate within the circuit model. From this, Chen and the research team can balance the estimation of power needed to process through the system and the energy that the system dissipates.
According to Chen, this approach also compensates for the cooling energy needed for superconducting technologies and reduces the energy dissipation by two orders of magnitude.
“These results demonstrate the potential of AQFP technology and applications for large-scale, high-performance and energy-efficient computations,” Chen said.
Ultimately, the researchers plan to develop a fully automated framework to generate the most efficient AQFP circuit layout.
“The synthesis results of AQFP circuits are highly promising in terms of energy-efficient and high-performance computing,” Chen said. “With the future advancing and maturity of AQFP fabrication technology, we anticipate broader applications ranging from space applications and large-scale computing facilities such as data centers.”
Other contributors include Nobuyuki Yoshikawa, Naoki Takeuchi, Fei Ke, Taiki Yamae and Ro Saito of Yokohama National University. Takeuchi is also affiliated with the Japan Science and Technology Agency. Other authors include Ruizhe Cai and Yanzhi Wang, both of Northeastern University.
This work was supported in part by the Office of the Director of National Intelligence of the Intelligence Advanced Research Projects Activity via the U.S. Army Research Office.
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