Researchers have demonstrated a method for detecting stress directly on a small, low-power microcontroller using heart rate signals, eliminating the need to send data to the cloud. Published in Discover Electronics, the study by Koay Xian Cong and Hermawan Nugroho presents a systematic investigation into deploying lightweight deep neural networks on an ARM Cortex-M4 processor. The work addresses the growing demand for continuous stress monitoring in wearable devices, which requires inference architectures that operate within the strict memory and power constraints of embedded hardware. By keeping the computation on the device, the system offers a pathway toward privacy-preserving mental health monitoring without the latency and security concerns associated with cloud-based transmission.
The study focused on binary stress classification, distinguishing between stress and non-stress states, using single-lead electrocardiogram (ECG) signals. ECG signals capture the electrical activity of the heart, which is influenced by the autonomic nervous system. The interplay between the sympathetic and parasympathetic nervous systems produces distinguishable variations in ECG morphology during different emotional experiences, making the heart signal a viable modality for detecting emotional states. The researchers used the WESAD (Wearable Stress and Affect Detection) dataset, which contains multimodal physiological data from 15 participants across four affective states: neutral, stress, amusement, and meditation. Only the ECG channel was extracted for this study, and the data was simplified to a binary classification task to reduce model complexity and address overfitting challenges.
The hardware platform used for this deployment was the STM32MP157F-DK2 development board, which features a dual-processor architecture. The researchers specifically utilized the ARM Cortex-M4 coprocessor, a 32-bit RISC processor designed for embedded and Internet of Things applications. This processor operates at up to 209 MHz but is constrained by only 128 KB of FLASH memory and 256 KB of SRAM. These stringent limits are typical for TinyML applications, where the goal is to run artificial intelligence models on devices with extremely limited resources. The system was configured to run in engineering boot mode, allowing the Cortex-M4 to execute the AI inference firmware independently of the Linux operating system that runs on the main application processor.
Two lightweight deep neural network architectures were developed and tested: an artificial neural network (ANN) and a one-dimensional convolutional neural network (1D-CNN). The ANN served as a minimal dense baseline with five hidden layers, while the 1D-CNN was chosen because it can extract local morphological features from the ordered one-dimensional time series of the ECG signal using weight sharing. This parameter efficiency is crucial when FLASH and SRAM are the binding constraints. The models were trained on ECG signals downsampled to 500 Hz and segmented into balanced one-second windows. The data preprocessing involved converting raw values to a 16-bit representation and performing random under-sampling to balance the classes, which were originally imbalanced in the WESAD dataset.
The models were iteratively optimized to satisfy the hardware budgets of the microcontroller. This process involved systematically reducing the number of layers, neurons, and input dimensions until the models could be compiled and flashed onto the device. The trained models were converted to TensorFlow Lite format and imported into STM32CubeIDE using the X-CUBE-AI tool, which provides model analysis, compression, and code generation. Medium compression was applied to balance memory reduction and accuracy preservation, as higher compression levels were found to significantly degrade model performance. The X-CUBE-AI “Analyze” function verified compatibility with the hardware constraints before deployment, ensuring that the model weights and activation buffers would fit within the available memory regions.
The results showed that both architectures were successfully deployed and executed on the ARM Cortex-M4 without cloud dependency. The ANN, which used 1500 input features corresponding to a three-second window, achieved a test accuracy of 78.74% with an inference latency of 6.29 milliseconds. The 1D-CNN, which used 500 input features corresponding to a one-second window, achieved a slightly higher test accuracy of 79.34% but with a longer inference latency of 13.43 milliseconds. The 1D-CNN demonstrated superior convergence behavior with no observable overfitting, while the ANN was significantly faster in terms of inference time. Both models fit within the 128 KB FLASH and 256 KB SRAM budget, with the model-level footprint ranging from approximately 28.2 to 34.5 KB of FLASH and 21.3 to 25.8 KB of SRAM.
End-to-end validation was performed using live ECG data acquired through an AD8232 sensor, a single-lead heart rate monitor module. The sensor was interfaced with the STM32 board via Arduino-compatible connectors, using three disposable Ag/AgCl electrodes in a standard Lead-I configuration. The system successfully acquired ECG signals at 500 Hz using a 16-bit analog-to-digital converter with DMA transfer. The serial monitors displayed real-time classification outputs with confidence scores for each class, demonstrating that the system could produce alternating stress and non-stress predictions during the demonstration. This live test served as a qualitative, end-to-end functional demonstration rather than a quantitative validation of classification accuracy, as no labelled ground-truth protocol was applied to the live recording.
The study highlights the trade-offs between accuracy and deployability in resource-constrained environments. An unconstrained 1D-CNN architecture achieved 83.91% accuracy but could not be deployed because it exceeded the FLASH and SRAM budget. Through iterative simplification, the best deployable configuration achieved 79.34%, representing a 4.57 percentage point deployment penalty. This penalty is the quantitative cost of satisfying the hardware budget and is inherent to resource-constrained platforms. The researchers note that this trade-off is important for practitioners estimating achievable performance when targeting Cortex-M class devices, as it provides a realistic baseline expectation rather than relying on unconstrained benchmark results that do not account for memory limits.
The choice between the ANN and 1D-CNN depends on the specific deployment priorities of the target application. For latency-critical scenarios such as real-time alarm triggering, the ANN’s faster inference time is advantageous. For applications prioritizing classification robustness with tolerance for slightly longer inference, the 1D-CNN offers superior generalization behavior and a shorter input window, enabling faster system responsiveness at the signal acquisition level. In both cases, the inference latencies remain well below the input window durations, confirming that computation is not the bottleneck in the real-time pipeline. This distinction is particularly relevant for wearable deployment, where power budget and responsiveness must be jointly optimized.
The study acknowledges several limitations that qualify the evaluation. The WESAD dataset contains data from only 15 participants, and the evaluation employed a single train-test split rather than subject-independent cross-validation. The data partition was performed at the window level using a random 85/15 split, meaning windows from the same participant may appear in both the training and test partitions. Consequently, the reported accuracies are segment-level performance and are not presented as evidence of subject-generalizable stress detection. A subject-independent protocol, such as leave-one-subject-out cross-validation, is identified as a priority for future work to establish generalizable performance.
Furthermore, the binary classification is a simplification that does not reflect the complexity of real-world affective states, and the AD8232 sensor provides single-lead ECG, which may not capture the full range of stress-induced cardiac variations. The deployment penalty analysis is based on a single hardware platform, and the magnitude of this penalty may differ on other Cortex-M variants with different memory configurations. The researchers also note that model assessment relied principally on accuracy, and a complete evaluation including precision, recall, and F1-score is needed to fully characterize the binary classifier. Like-for-like benchmarking against classical lightweight baselines, such as support vector machines or random forests, is identified as a necessary comparison to clarify whether the neural models offer a meaningful advantage over simpler, more interpretable alternatives.
Despite these limitations, the study provides a reproducible methodological framework for deploying physiological classification models on Cortex-M class microcontrollers. The stepwise model reduction strategy offers a transferable heuristic for practitioners targeting similar resource-constrained platforms. The integration of real-time sensor interfacing, on-chip inference, and UART-based output within a single embedded pipeline demonstrates a complete end-to-end deployment paradigm that extends beyond simulation-based benchmarks. The successful deployment of these models suggests that clinically meaningful stress classification is achievable on resource-constrained platforms without cloud dependency, offering a practical foundation for privacy-preserving, cloud-independent wearable stress monitoring in ambulatory and resource-limited healthcare settings.
Subject of Research: On-device ECG stress detection deployed on a resource-constrained ARM Cortex-M4 microcontroller
Article Title: On-device ECG stress detection deployed on a resource-constrained ARM Cortex-M4 microcontroller
Article References: Cong, K. X., & Nugroho, H. (2026). On-device ECG stress detection deployed on a resource-constrained ARM Cortex-M4 microcontroller. Discover Electronics, 3(1), Article 125. https://doi.org/10.1007/s44291-026-00279-8
Image Credits: AI Generated
DOI: 10.1007/s44291-026-00279-8
Keywords: On-device, stress, detection, deployed, resource-constrained, Cortex-M4, microcontroller, scientific research
News Source: Denise Maddox. (November 11, 2026). Tiny AI Chip Detects Stress from Heart Signals. Scienmag.
